2014-11-04 18:12:14 +00:00
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Jason Ekstrand (jason@jlekstrand.net)
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*
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*/
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#include "nir.h"
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2015-07-22 03:54:18 +01:00
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#include "nir_control_flow.h"
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2014-11-04 18:12:14 +00:00
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/*
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* Implements a small peephole optimization that looks for
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*
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* if (cond) {
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2016-09-07 03:45:51 +01:00
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* <then SSA defs>
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2014-11-04 18:12:14 +00:00
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* } else {
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2016-09-07 03:45:51 +01:00
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* <else SSA defs>
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2014-11-04 18:12:14 +00:00
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* }
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* phi
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* ...
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* phi
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*
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2016-09-07 03:45:51 +01:00
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* and replaces it with:
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*
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* <then SSA defs>
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* <else SSA defs>
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* bcsel
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* ...
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* bcsel
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*
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* where the SSA defs are ALU operations or other cheap instructions (not
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* texturing, for example).
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*
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* If the number of ALU operations in the branches is greater than the limit
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* parameter, then the optimization is skipped. In limit=0 mode, the SSA defs
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* must only be MOVs which we expect to get copy-propagated away once they're
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* out of the inner blocks.
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2014-11-04 18:12:14 +00:00
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*/
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static bool
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2016-09-07 03:45:51 +01:00
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block_check_for_allowed_instrs(nir_block *block, unsigned *count, bool alu_ok)
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2014-11-04 18:12:14 +00:00
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{
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2016-04-27 02:34:19 +01:00
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nir_foreach_instr(instr, block) {
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2015-03-16 21:45:54 +00:00
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switch (instr->type) {
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2015-03-16 22:08:04 +00:00
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case nir_instr_type_intrinsic: {
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_var:
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switch (intrin->variables[0]->var->data.mode) {
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case nir_var_shader_in:
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case nir_var_uniform:
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break;
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default:
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return false;
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}
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break;
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2016-09-07 03:45:51 +01:00
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case nir_intrinsic_load_uniform:
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if (!alu_ok)
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return false;
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break;
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2015-03-16 22:08:04 +00:00
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default:
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return false;
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}
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break;
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}
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case nir_instr_type_load_const:
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break;
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2015-03-16 21:45:54 +00:00
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case nir_instr_type_alu: {
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nir_alu_instr *mov = nir_instr_as_alu(instr);
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2015-06-24 07:17:53 +01:00
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switch (mov->op) {
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case nir_op_fmov:
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case nir_op_imov:
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case nir_op_fneg:
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case nir_op_ineg:
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case nir_op_fabs:
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case nir_op_iabs:
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case nir_op_vec2:
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case nir_op_vec3:
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case nir_op_vec4:
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break;
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default:
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2016-09-07 03:45:51 +01:00
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if (!alu_ok) {
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/* It must be a move-like operation. */
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return false;
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}
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break;
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2015-06-24 07:17:53 +01:00
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}
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2014-11-04 18:12:14 +00:00
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2015-03-16 21:45:54 +00:00
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/* It must be SSA */
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if (!mov->dest.dest.is_ssa)
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return false;
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2014-11-04 18:12:14 +00:00
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2016-09-07 03:45:51 +01:00
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if (alu_ok) {
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(*count)++;
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} else {
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/* Can't handle saturate */
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if (mov->dest.saturate)
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return false;
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2014-11-04 18:12:14 +00:00
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2016-09-07 03:45:51 +01:00
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/* It cannot have any if-uses */
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if (!list_empty(&mov->dest.dest.ssa.if_uses))
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2015-03-16 21:45:54 +00:00
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return false;
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2016-09-07 03:45:51 +01:00
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/* The only uses of this definition must be phi's in the successor */
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nir_foreach_use(use, &mov->dest.dest.ssa) {
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if (use->parent_instr->type != nir_instr_type_phi ||
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use->parent_instr->block != block->successors[0])
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return false;
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}
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2015-03-16 21:45:54 +00:00
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}
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break;
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}
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2014-11-04 18:12:14 +00:00
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2015-03-16 21:45:54 +00:00
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default:
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return false;
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2014-11-04 18:12:14 +00:00
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}
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}
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return true;
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}
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static bool
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2016-12-24 18:58:17 +00:00
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nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
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unsigned limit)
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2014-11-04 18:12:14 +00:00
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{
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if (nir_cf_node_is_first(&block->cf_node))
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2016-04-12 20:03:41 +01:00
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return false;
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2014-11-04 18:12:14 +00:00
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nir_cf_node *prev_node = nir_cf_node_prev(&block->cf_node);
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if (prev_node->type != nir_cf_node_if)
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2016-04-12 20:03:41 +01:00
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return false;
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2014-11-04 18:12:14 +00:00
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nir_if *if_stmt = nir_cf_node_as_if(prev_node);
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2016-10-06 03:08:57 +01:00
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nir_block *then_block = nir_if_first_then_block(if_stmt);
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nir_block *else_block = nir_if_first_else_block(if_stmt);
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2014-11-04 18:12:14 +00:00
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/* We can only have one block in each side ... */
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2016-10-06 03:08:57 +01:00
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if (nir_if_last_then_block(if_stmt) != then_block ||
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nir_if_last_else_block(if_stmt) != else_block)
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2016-04-12 20:03:41 +01:00
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return false;
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2014-11-04 18:12:14 +00:00
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2015-03-16 21:45:54 +00:00
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/* ... and those blocks must only contain "allowed" instructions. */
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2016-09-07 03:45:51 +01:00
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unsigned count = 0;
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if (!block_check_for_allowed_instrs(then_block, &count, limit != 0) ||
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!block_check_for_allowed_instrs(else_block, &count, limit != 0))
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return false;
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if (count > limit)
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2016-04-12 20:03:41 +01:00
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return false;
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2014-11-04 18:12:14 +00:00
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/* At this point, we know that the previous CFG node is an if-then
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* statement containing only moves to phi nodes in this block. We can
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* just remove that entire CF node and replace all of the phi nodes with
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* selects.
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*/
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2015-03-16 21:55:00 +00:00
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nir_block *prev_block = nir_cf_node_as_block(nir_cf_node_prev(prev_node));
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/* First, we move the remaining instructions from the blocks to the
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* block before. We have already guaranteed that this is safe by
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* calling block_check_for_allowed_instrs()
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*/
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2016-04-27 02:34:19 +01:00
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nir_foreach_instr_safe(instr, then_block) {
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2015-03-16 21:55:00 +00:00
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exec_node_remove(&instr->node);
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instr->block = prev_block;
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exec_list_push_tail(&prev_block->instr_list, &instr->node);
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}
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2016-04-27 02:34:19 +01:00
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nir_foreach_instr_safe(instr, else_block) {
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2015-03-16 21:55:00 +00:00
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exec_node_remove(&instr->node);
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instr->block = prev_block;
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exec_list_push_tail(&prev_block->instr_list, &instr->node);
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}
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2016-04-27 02:34:19 +01:00
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nir_foreach_instr_safe(instr, block) {
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2014-11-04 18:12:14 +00:00
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if (instr->type != nir_instr_type_phi)
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break;
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nir_phi_instr *phi = nir_instr_as_phi(instr);
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2016-12-24 18:58:17 +00:00
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nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel);
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2015-09-09 21:18:29 +01:00
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nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
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2014-12-13 04:37:04 +00:00
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/* Splat the condition to all channels */
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memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
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2014-11-04 18:12:14 +00:00
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assert(exec_list_length(&phi->srcs) == 2);
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2016-04-27 04:16:21 +01:00
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nir_foreach_phi_src(src, phi) {
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2014-11-04 18:12:14 +00:00
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assert(src->pred == then_block || src->pred == else_block);
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assert(src->src.is_ssa);
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unsigned idx = src->pred == then_block ? 1 : 2;
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2015-09-09 21:18:29 +01:00
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nir_src_copy(&sel->src[idx].src, &src->src, sel);
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2014-11-04 18:12:14 +00:00
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}
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2015-01-21 00:23:51 +00:00
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nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
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2015-11-17 12:57:54 +00:00
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phi->dest.ssa.num_components,
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phi->dest.ssa.bit_size, phi->dest.ssa.name);
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2014-11-04 18:12:14 +00:00
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sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
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2015-01-21 19:11:03 +00:00
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nir_ssa_def_rewrite_uses(&phi->dest.ssa,
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2015-09-09 21:24:35 +01:00
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nir_src_for_ssa(&sel->dest.dest.ssa));
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2014-11-04 18:12:14 +00:00
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nir_instr_insert_before(&phi->instr, &sel->instr);
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nir_instr_remove(&phi->instr);
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}
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nir_cf_node_remove(&if_stmt->cf_node);
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return true;
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}
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static bool
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2016-09-07 03:45:51 +01:00
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nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit)
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2014-11-04 18:12:14 +00:00
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{
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2016-12-24 18:58:17 +00:00
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nir_shader *shader = impl->function->shader;
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2016-04-12 20:03:41 +01:00
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bool progress = false;
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2014-11-04 18:12:14 +00:00
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2016-04-12 20:03:41 +01:00
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nir_foreach_block_safe(block, impl) {
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2016-12-24 18:58:17 +00:00
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progress |= nir_opt_peephole_select_block(block, shader, limit);
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2016-04-12 20:03:41 +01:00
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}
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2014-11-04 18:12:14 +00:00
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2016-04-12 20:03:41 +01:00
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if (progress)
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2014-12-13 00:22:46 +00:00
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nir_metadata_preserve(impl, nir_metadata_none);
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2014-11-04 18:12:14 +00:00
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2016-04-12 20:03:41 +01:00
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return progress;
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2014-11-04 18:12:14 +00:00
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}
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bool
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2016-09-07 03:45:51 +01:00
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nir_opt_peephole_select(nir_shader *shader, unsigned limit)
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2014-11-04 18:12:14 +00:00
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{
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bool progress = false;
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2016-04-27 04:26:42 +01:00
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nir_foreach_function(function, shader) {
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2015-12-26 18:00:47 +00:00
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if (function->impl)
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2016-09-07 03:45:51 +01:00
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progress |= nir_opt_peephole_select_impl(function->impl, limit);
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2014-11-04 18:12:14 +00:00
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}
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return progress;
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}
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