2015-04-07 23:15:09 +01:00
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_nir.h"
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2015-08-12 22:29:25 +01:00
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#include "brw_shader.h"
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2015-04-07 23:15:09 +01:00
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#include "glsl/glsl_parser_extras.h"
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#include "glsl/nir/glsl_to_nir.h"
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#include "program/prog_to_nir.h"
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static void
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2015-06-25 08:52:35 +01:00
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nir_optimize(nir_shader *nir, bool is_scalar)
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2015-04-07 23:15:09 +01:00
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{
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bool progress;
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do {
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progress = false;
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nir_lower_vars_to_ssa(nir);
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nir_validate_shader(nir);
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2015-06-25 08:52:35 +01:00
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if (is_scalar) {
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nir_lower_alu_to_scalar(nir);
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nir_validate_shader(nir);
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}
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2015-04-07 23:15:09 +01:00
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progress |= nir_copy_prop(nir);
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nir_validate_shader(nir);
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2015-07-15 08:32:17 +01:00
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if (is_scalar) {
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nir_lower_phis_to_scalar(nir);
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nir_validate_shader(nir);
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}
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2015-04-07 23:15:09 +01:00
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progress |= nir_copy_prop(nir);
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nir_validate_shader(nir);
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progress |= nir_opt_dce(nir);
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nir_validate_shader(nir);
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progress |= nir_opt_cse(nir);
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nir_validate_shader(nir);
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progress |= nir_opt_peephole_select(nir);
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nir_validate_shader(nir);
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progress |= nir_opt_algebraic(nir);
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nir_validate_shader(nir);
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progress |= nir_opt_constant_folding(nir);
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nir_validate_shader(nir);
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2015-05-01 07:51:12 +01:00
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progress |= nir_opt_dead_cf(nir);
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nir_validate_shader(nir);
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2015-04-07 23:15:09 +01:00
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progress |= nir_opt_remove_phis(nir);
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nir_validate_shader(nir);
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2015-08-21 14:42:45 +01:00
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progress |= nir_opt_undef(nir);
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nir_validate_shader(nir);
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2015-04-07 23:15:09 +01:00
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} while (progress);
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}
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nir_shader *
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brw_create_nir(struct brw_context *brw,
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const struct gl_shader_program *shader_prog,
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const struct gl_program *prog,
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2015-07-22 08:35:28 +01:00
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gl_shader_stage stage,
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bool is_scalar)
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2015-04-07 23:15:09 +01:00
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{
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struct gl_context *ctx = &brw->ctx;
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const nir_shader_compiler_options *options =
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ctx->Const.ShaderCompilerOptions[stage].NirOptions;
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2015-09-16 17:56:58 +01:00
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static const nir_lower_tex_options tex_options = {
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.lower_txp = ~0,
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};
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2015-04-07 23:15:09 +01:00
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struct gl_shader *shader = shader_prog ? shader_prog->_LinkedShaders[stage] : NULL;
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bool debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage);
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nir_shader *nir;
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/* First, lower the GLSL IR or Mesa IR to NIR */
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if (shader_prog) {
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nir = glsl_to_nir(shader, options);
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} else {
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nir = prog_to_nir(prog, options);
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nir_convert_to_ssa(nir); /* turn registers into SSA */
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}
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nir_validate_shader(nir);
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nir_lower_global_vars_to_local(nir);
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nir_validate_shader(nir);
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2015-09-16 17:56:58 +01:00
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nir_lower_tex(nir, &tex_options);
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2015-04-07 23:15:09 +01:00
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nir_validate_shader(nir);
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nir_normalize_cubemap_coords(nir);
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nir_validate_shader(nir);
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nir_split_var_copies(nir);
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nir_validate_shader(nir);
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2015-06-25 08:52:35 +01:00
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nir_optimize(nir, is_scalar);
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2015-04-07 23:15:09 +01:00
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/* Lower a bunch of stuff */
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nir_lower_var_copies(nir);
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nir_validate_shader(nir);
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/* Get rid of split copies */
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2015-06-25 08:52:35 +01:00
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nir_optimize(nir, is_scalar);
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2015-04-07 23:15:09 +01:00
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2015-07-03 07:23:33 +01:00
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if (is_scalar) {
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2015-08-18 20:00:15 +01:00
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nir_assign_var_locations(&nir->uniforms,
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&nir->num_uniforms,
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type_size_scalar);
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2015-08-12 22:29:25 +01:00
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nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_scalar);
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nir_assign_var_locations(&nir->outputs, &nir->num_outputs, type_size_scalar);
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nir_lower_io(nir, type_size_scalar);
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2015-07-03 07:23:33 +01:00
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} else {
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nir_assign_var_locations(&nir->uniforms,
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&nir->num_uniforms,
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2015-08-12 22:29:25 +01:00
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type_size_vec4);
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nir_assign_var_locations(&nir->inputs, &nir->num_inputs, type_size_vec4);
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2015-06-16 20:31:49 +01:00
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foreach_list_typed(nir_variable, var, node, &nir->outputs)
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var->data.driver_location = var->data.location;
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2015-06-18 12:52:21 +01:00
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2015-08-12 22:29:25 +01:00
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nir_lower_io(nir, type_size_vec4);
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}
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2015-04-07 23:15:09 +01:00
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nir_validate_shader(nir);
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nir_remove_dead_variables(nir);
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nir_validate_shader(nir);
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if (shader_prog) {
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2015-08-18 09:53:29 +01:00
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nir_lower_samplers(nir, shader_prog);
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2015-04-07 23:15:09 +01:00
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nir_validate_shader(nir);
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}
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nir_lower_system_values(nir);
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nir_validate_shader(nir);
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nir_lower_atomics(nir);
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nir_validate_shader(nir);
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2015-06-25 08:52:35 +01:00
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nir_optimize(nir, is_scalar);
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2015-04-07 23:15:09 +01:00
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if (brw->gen >= 6) {
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/* Try and fuse multiply-adds */
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nir_opt_peephole_ffma(nir);
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nir_validate_shader(nir);
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}
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nir_opt_algebraic_late(nir);
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nir_validate_shader(nir);
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nir_lower_locals_to_regs(nir);
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nir_validate_shader(nir);
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nir_lower_to_source_mods(nir);
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nir_validate_shader(nir);
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nir_copy_prop(nir);
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nir_validate_shader(nir);
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nir_opt_dce(nir);
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nir_validate_shader(nir);
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if (unlikely(debug_enabled)) {
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2015-06-10 09:46:13 +01:00
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/* Re-index SSA defs so we print more sensible numbers. */
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nir_foreach_overload(nir, overload) {
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if (overload->impl)
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nir_index_ssa_defs(overload->impl);
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}
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2015-04-07 23:15:09 +01:00
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fprintf(stderr, "NIR (SSA form) for %s shader:\n",
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_mesa_shader_stage_to_string(stage));
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nir_print_shader(nir, stderr);
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}
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2015-09-09 21:55:39 +01:00
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nir_convert_from_ssa(nir, true);
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2015-04-07 23:15:09 +01:00
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nir_validate_shader(nir);
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2015-06-16 21:58:15 +01:00
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if (!is_scalar) {
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2015-09-09 00:45:57 +01:00
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nir_move_vec_src_uses_to_dest(nir);
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nir_validate_shader(nir);
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2015-06-16 21:58:15 +01:00
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nir_lower_vec_to_movs(nir);
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nir_validate_shader(nir);
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}
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2015-04-07 23:15:09 +01:00
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/* This is the last pass we run before we start emitting stuff. It
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* determines when we need to insert boolean resolves on Gen <= 5. We
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* run it last because it stashes data in instr->pass_flags and we don't
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* want that to be squashed by other NIR passes.
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*/
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if (brw->gen <= 5)
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brw_nir_analyze_boolean_resolves(nir);
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nir_sweep(nir);
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if (unlikely(debug_enabled)) {
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fprintf(stderr, "NIR (final form) for %s shader:\n",
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_mesa_shader_stage_to_string(stage));
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nir_print_shader(nir, stderr);
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}
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return nir;
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}
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2015-04-17 17:10:50 +01:00
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enum brw_reg_type
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brw_type_for_nir_type(nir_alu_type type)
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{
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switch (type) {
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case nir_type_unsigned:
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return BRW_REGISTER_TYPE_UD;
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case nir_type_bool:
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case nir_type_int:
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return BRW_REGISTER_TYPE_D;
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case nir_type_float:
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return BRW_REGISTER_TYPE_F;
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default:
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unreachable("unknown type");
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}
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return BRW_REGISTER_TYPE_F;
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}
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2015-06-17 09:59:10 +01:00
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/* Returns the glsl_base_type corresponding to a nir_alu_type.
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* This is used by both brw_vec4_nir and brw_fs_nir.
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*/
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enum glsl_base_type
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brw_glsl_base_type_for_nir_type(nir_alu_type type)
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{
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switch (type) {
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case nir_type_float:
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return GLSL_TYPE_FLOAT;
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case nir_type_int:
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return GLSL_TYPE_INT;
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case nir_type_unsigned:
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return GLSL_TYPE_UINT;
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default:
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unreachable("bad type");
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}
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}
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