2019-07-25 22:33:58 +01:00
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/*
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* Copyright (C) 2018 Alyssa Rosenzweig
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* Copyright (C) 2019 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "compiler.h"
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/* Basic dead code elimination on the MIR itself */
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bool
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midgard_opt_dead_code_eliminate(compiler_context *ctx, midgard_block *block)
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{
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bool progress = false;
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mir_foreach_instr_in_block_safe(block, ins) {
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if (ins->type != TAG_ALU_4) continue;
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if (ins->compact_branch) continue;
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2019-08-26 19:58:27 +01:00
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if (ins->dest >= SSA_FIXED_MINIMUM) continue;
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if (mir_is_live_after(ctx, block, ins, ins->dest)) continue;
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2019-07-25 22:33:58 +01:00
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mir_remove_instruction(ins);
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progress = true;
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}
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return progress;
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}
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2019-07-25 22:43:32 +01:00
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/* Removes dead moves, that is, moves with a destination overwritten before
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* being read. Normally handled implicitly as part of DCE, but this has to run
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* after the out-of-SSA pass */
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bool
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midgard_opt_dead_move_eliminate(compiler_context *ctx, midgard_block *block)
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{
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bool progress = false;
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mir_foreach_instr_in_block_safe(block, ins) {
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if (ins->type != TAG_ALU_4) continue;
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if (ins->compact_branch) continue;
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if (!OP_IS_MOVE(ins->alu.op)) continue;
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/* Check if it's overwritten in this block before being read */
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bool overwritten = false;
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mir_foreach_instr_in_block_from(block, q, mir_next_op(ins)) {
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/* Check if used */
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2019-08-26 19:58:27 +01:00
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if (mir_has_arg(q, ins->dest))
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2019-07-25 22:43:32 +01:00
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break;
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/* Check if overwritten */
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2019-08-26 19:58:27 +01:00
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if (q->dest == ins->dest) {
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2019-07-25 22:43:32 +01:00
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/* Special case to vec4; component tracking is
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* harder */
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overwritten = (q->mask == 0xF);
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break;
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}
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}
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if (overwritten) {
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mir_remove_instruction(ins);
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progress = true;
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}
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}
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return progress;
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}
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