2019-11-11 17:05:03 +00:00
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/*
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* Copyright © 2019 Valve Corporation.
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* Copyright © 2016 Red Hat.
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* based in part on anv driver which is:
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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2021-04-10 02:24:05 +01:00
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#include "radv_shader_args.h"
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2019-11-11 17:05:03 +00:00
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#include "radv_private.h"
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#include "radv_shader.h"
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static void
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2021-04-10 02:24:05 +01:00
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set_loc(struct radv_userdata_info *ud_info, uint8_t *sgpr_idx, uint8_t num_sgprs)
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2019-11-11 17:05:03 +00:00
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{
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2021-04-10 02:24:05 +01:00
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ud_info->sgpr_idx = *sgpr_idx;
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ud_info->num_sgprs = num_sgprs;
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*sgpr_idx += num_sgprs;
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2019-11-11 17:05:03 +00:00
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}
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static void
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2021-04-10 02:24:05 +01:00
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set_loc_shader(struct radv_shader_args *args, int idx, uint8_t *sgpr_idx, uint8_t num_sgprs)
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2019-11-11 17:05:03 +00:00
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{
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2021-04-10 02:24:05 +01:00
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struct radv_userdata_info *ud_info = &args->shader_info->user_sgprs_locs.shader_data[idx];
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assert(ud_info);
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2019-11-11 17:05:03 +00:00
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2021-04-10 02:24:05 +01:00
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set_loc(ud_info, sgpr_idx, num_sgprs);
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2019-11-11 17:05:03 +00:00
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}
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static void
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set_loc_shader_ptr(struct radv_shader_args *args, int idx, uint8_t *sgpr_idx)
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{
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2021-04-10 02:24:05 +01:00
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bool use_32bit_pointers = idx != AC_UD_SCRATCH_RING_OFFSETS;
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2019-11-11 17:05:03 +00:00
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2021-04-10 02:24:05 +01:00
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set_loc_shader(args, idx, sgpr_idx, use_32bit_pointers ? 1 : 2);
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2019-11-11 17:05:03 +00:00
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}
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static void
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set_loc_desc(struct radv_shader_args *args, int idx, uint8_t *sgpr_idx)
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{
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2021-04-10 02:24:05 +01:00
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struct radv_userdata_locations *locs = &args->shader_info->user_sgprs_locs;
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struct radv_userdata_info *ud_info = &locs->descriptor_sets[idx];
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assert(ud_info);
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2019-11-11 17:05:03 +00:00
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2021-04-10 02:24:05 +01:00
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set_loc(ud_info, sgpr_idx, 1);
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2019-11-11 17:05:03 +00:00
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2021-04-10 02:24:05 +01:00
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locs->descriptor_sets_enabled |= 1u << idx;
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2019-11-11 17:05:03 +00:00
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}
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struct user_sgpr_info {
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2021-04-10 02:24:05 +01:00
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bool indirect_all_descriptor_sets;
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uint8_t remaining_sgprs;
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2019-11-11 17:05:03 +00:00
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};
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2021-04-10 02:24:05 +01:00
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static bool
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needs_view_index_sgpr(struct radv_shader_args *args, gl_shader_stage stage)
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2019-11-11 17:05:03 +00:00
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{
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2021-04-10 02:24:05 +01:00
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switch (stage) {
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case MESA_SHADER_VERTEX:
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if (args->shader_info->needs_multiview_view_index ||
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(!args->options->key.vs_common_out.as_es && !args->options->key.vs_common_out.as_ls &&
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args->options->key.has_multiview_view_index))
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return true;
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break;
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case MESA_SHADER_TESS_EVAL:
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if (args->shader_info->needs_multiview_view_index ||
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(!args->options->key.vs_common_out.as_es && args->options->key.has_multiview_view_index))
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return true;
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break;
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case MESA_SHADER_TESS_CTRL:
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if (args->shader_info->needs_multiview_view_index)
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return true;
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break;
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case MESA_SHADER_GEOMETRY:
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if (args->shader_info->needs_multiview_view_index ||
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(args->options->key.vs_common_out.as_ngg && args->options->key.has_multiview_view_index))
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return true;
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break;
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default:
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break;
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}
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return false;
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2019-11-11 17:05:03 +00:00
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}
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static uint8_t
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count_vs_user_sgprs(struct radv_shader_args *args)
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{
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2021-04-10 02:24:05 +01:00
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uint8_t count = 1; /* vertex offset */
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2019-11-11 17:05:03 +00:00
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radv,aco: use per-attribute vertex descriptors for robustness
We have to use a different num_records for each attribute to correctly
implement robust buffer access.
fossil-db (GFX10.3, robustBufferAccess enabled):
Totals from 60059 (41.06% of 146267) affected shaders:
VGPRs: 2169040 -> 2169024 (-0.00%); split: -0.02%, +0.02%
CodeSize: 79473128 -> 81156016 (+2.12%); split: -0.00%, +2.12%
MaxWaves: 1635360 -> 1635258 (-0.01%); split: +0.00%, -0.01%
Instrs: 15559040 -> 15793205 (+1.51%); split: -0.01%, +1.52%
Latency: 90954792 -> 91308768 (+0.39%); split: -0.30%, +0.69%
InvThroughput: 14937873 -> 14958761 (+0.14%); split: -0.04%, +0.18%
VClause: 444280 -> 412074 (-7.25%); split: -9.22%, +1.97%
SClause: 588545 -> 644141 (+9.45%); split: -0.54%, +9.99%
Copies: 1010395 -> 1011232 (+0.08%); split: -0.44%, +0.53%
Branches: 274279 -> 274282 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 1431171 -> 1405056 (-1.82%); split: -2.89%, +1.07%
PreVGPRs: 1575253 -> 1575259 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7871>
2020-12-01 17:41:16 +00:00
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if (args->shader_info->vs.vb_desc_usage_mask)
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2021-04-10 02:24:05 +01:00
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count++;
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if (args->shader_info->vs.needs_draw_id)
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count++;
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if (args->shader_info->vs.needs_base_instance)
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count++;
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2019-11-11 17:05:03 +00:00
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2021-04-10 02:24:05 +01:00
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return count;
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2019-11-11 17:05:03 +00:00
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}
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2021-06-07 22:23:38 +01:00
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static unsigned
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count_ngg_sgprs(struct radv_shader_args *args, gl_shader_stage stage)
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{
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unsigned count = 0;
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if (stage == MESA_SHADER_GEOMETRY)
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count += 1; /* ngg_gs_state */
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if (args->shader_info->has_ngg_culling)
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count += 5; /* ngg_culling_settings + 4x ngg_viewport_* */
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return count;
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}
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2021-04-10 02:24:05 +01:00
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static void
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allocate_inline_push_consts(struct radv_shader_args *args, struct user_sgpr_info *user_sgpr_info)
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2019-11-11 17:05:03 +00:00
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{
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2021-04-10 02:24:05 +01:00
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uint8_t remaining_sgprs = user_sgpr_info->remaining_sgprs;
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/* Only supported if shaders use push constants. */
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if (args->shader_info->min_push_constant_used == UINT8_MAX)
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return;
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/* Only supported if shaders don't have indirect push constants. */
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if (args->shader_info->has_indirect_push_constants)
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return;
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/* Only supported for 32-bit push constants. */
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if (!args->shader_info->has_only_32bit_push_constants)
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return;
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uint8_t num_push_consts =
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(args->shader_info->max_push_constant_used - args->shader_info->min_push_constant_used) / 4;
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/* Check if the number of user SGPRs is large enough. */
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if (num_push_consts < remaining_sgprs) {
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args->shader_info->num_inline_push_consts = num_push_consts;
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} else {
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args->shader_info->num_inline_push_consts = remaining_sgprs;
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}
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/* Clamp to the maximum number of allowed inlined push constants. */
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if (args->shader_info->num_inline_push_consts > AC_MAX_INLINE_PUSH_CONSTS)
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args->shader_info->num_inline_push_consts = AC_MAX_INLINE_PUSH_CONSTS;
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if (args->shader_info->num_inline_push_consts == num_push_consts &&
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!args->shader_info->loads_dynamic_offsets) {
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/* Disable the default push constants path if all constants are
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* inlined and if shaders don't use dynamic descriptors.
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*/
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args->shader_info->loads_push_constants = false;
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}
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args->shader_info->base_inline_push_consts = args->shader_info->min_push_constant_used / 4;
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2019-11-11 17:05:03 +00:00
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}
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2021-04-10 02:24:05 +01:00
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static void
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allocate_user_sgprs(struct radv_shader_args *args, gl_shader_stage stage, bool has_previous_stage,
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gl_shader_stage previous_stage, bool needs_view_index,
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struct user_sgpr_info *user_sgpr_info)
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2019-11-11 17:05:03 +00:00
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{
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2021-04-10 02:24:05 +01:00
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uint8_t user_sgpr_count = 0;
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memset(user_sgpr_info, 0, sizeof(struct user_sgpr_info));
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/* 2 user sgprs will always be allocated for scratch/rings */
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user_sgpr_count += 2;
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switch (stage) {
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case MESA_SHADER_COMPUTE:
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2021-03-23 01:20:55 +00:00
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if (args->shader_info->cs.uses_sbt)
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user_sgpr_count += 1;
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2021-04-10 02:24:05 +01:00
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if (args->shader_info->cs.uses_grid_size)
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user_sgpr_count += 3;
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break;
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case MESA_SHADER_FRAGMENT:
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user_sgpr_count += args->shader_info->ps.needs_sample_positions;
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break;
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case MESA_SHADER_VERTEX:
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if (!args->is_gs_copy_shader)
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user_sgpr_count += count_vs_user_sgprs(args);
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2021-06-07 22:23:38 +01:00
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if (args->options->key.vs_common_out.as_ngg)
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user_sgpr_count += count_ngg_sgprs(args, stage);
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2021-04-10 02:24:05 +01:00
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break;
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case MESA_SHADER_TESS_CTRL:
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if (has_previous_stage) {
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if (previous_stage == MESA_SHADER_VERTEX)
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user_sgpr_count += count_vs_user_sgprs(args);
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}
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break;
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case MESA_SHADER_TESS_EVAL:
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2021-06-07 22:23:38 +01:00
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if (args->options->key.vs_common_out.as_ngg)
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user_sgpr_count += count_ngg_sgprs(args, stage);
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2021-04-10 02:24:05 +01:00
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break;
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case MESA_SHADER_GEOMETRY:
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if (has_previous_stage) {
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2021-04-27 16:01:45 +01:00
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if (args->options->key.vs_common_out.as_ngg)
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2021-06-07 22:23:38 +01:00
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user_sgpr_count += count_ngg_sgprs(args, stage);
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2021-04-27 16:01:45 +01:00
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2021-04-10 02:24:05 +01:00
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if (previous_stage == MESA_SHADER_VERTEX) {
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user_sgpr_count += count_vs_user_sgprs(args);
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}
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}
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break;
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default:
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break;
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}
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if (needs_view_index)
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user_sgpr_count++;
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if (args->shader_info->loads_push_constants)
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user_sgpr_count++;
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if (args->shader_info->so.num_outputs)
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user_sgpr_count++;
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uint32_t available_sgprs =
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args->options->chip_class >= GFX9 && stage != MESA_SHADER_COMPUTE ? 32 : 16;
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uint32_t remaining_sgprs = available_sgprs - user_sgpr_count;
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uint32_t num_desc_set = util_bitcount(args->shader_info->desc_set_used_mask);
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if (remaining_sgprs < num_desc_set) {
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user_sgpr_info->indirect_all_descriptor_sets = true;
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user_sgpr_info->remaining_sgprs = remaining_sgprs - 1;
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} else {
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user_sgpr_info->remaining_sgprs = remaining_sgprs - num_desc_set;
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}
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allocate_inline_push_consts(args, user_sgpr_info);
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2019-11-11 17:05:03 +00:00
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}
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static void
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declare_global_input_sgprs(struct radv_shader_args *args,
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2021-04-10 02:24:05 +01:00
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const struct user_sgpr_info *user_sgpr_info)
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2019-11-11 17:05:03 +00:00
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{
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2021-04-10 02:24:05 +01:00
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/* 1 for each descriptor set */
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if (!user_sgpr_info->indirect_all_descriptor_sets) {
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uint32_t mask = args->shader_info->desc_set_used_mask;
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while (mask) {
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int i = u_bit_scan(&mask);
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ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_PTR, &args->descriptor_sets[i]);
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}
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} else {
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ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_PTR_PTR, &args->descriptor_sets[0]);
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}
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if (args->shader_info->loads_push_constants) {
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/* 1 for push constants and dynamic descriptors */
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ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_PTR, &args->ac.push_constants);
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}
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for (unsigned i = 0; i < args->shader_info->num_inline_push_consts; i++) {
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ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.inline_push_consts[i]);
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}
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args->ac.num_inline_push_consts = args->shader_info->num_inline_push_consts;
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args->ac.base_inline_push_consts = args->shader_info->base_inline_push_consts;
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|
|
|
|
|
|
if (args->shader_info->so.num_outputs) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &args->streamout_buffers);
|
|
|
|
}
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2021-04-10 02:24:05 +01:00
|
|
|
declare_vs_specific_input_sgprs(struct radv_shader_args *args, gl_shader_stage stage,
|
|
|
|
bool has_previous_stage, gl_shader_stage previous_stage)
|
2019-11-11 17:05:03 +00:00
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
if (!args->is_gs_copy_shader && (stage == MESA_SHADER_VERTEX ||
|
|
|
|
(has_previous_stage && previous_stage == MESA_SHADER_VERTEX))) {
|
radv,aco: use per-attribute vertex descriptors for robustness
We have to use a different num_records for each attribute to correctly
implement robust buffer access.
fossil-db (GFX10.3, robustBufferAccess enabled):
Totals from 60059 (41.06% of 146267) affected shaders:
VGPRs: 2169040 -> 2169024 (-0.00%); split: -0.02%, +0.02%
CodeSize: 79473128 -> 81156016 (+2.12%); split: -0.00%, +2.12%
MaxWaves: 1635360 -> 1635258 (-0.01%); split: +0.00%, -0.01%
Instrs: 15559040 -> 15793205 (+1.51%); split: -0.01%, +1.52%
Latency: 90954792 -> 91308768 (+0.39%); split: -0.30%, +0.69%
InvThroughput: 14937873 -> 14958761 (+0.14%); split: -0.04%, +0.18%
VClause: 444280 -> 412074 (-7.25%); split: -9.22%, +1.97%
SClause: 588545 -> 644141 (+9.45%); split: -0.54%, +9.99%
Copies: 1010395 -> 1011232 (+0.08%); split: -0.44%, +0.53%
Branches: 274279 -> 274282 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 1431171 -> 1405056 (-1.82%); split: -2.89%, +1.07%
PreVGPRs: 1575253 -> 1575259 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7871>
2020-12-01 17:41:16 +00:00
|
|
|
if (args->shader_info->vs.vb_desc_usage_mask) {
|
2021-04-10 02:24:05 +01:00
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &args->ac.vertex_buffers);
|
|
|
|
}
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.base_vertex);
|
|
|
|
if (args->shader_info->vs.needs_draw_id) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.draw_id);
|
|
|
|
}
|
|
|
|
if (args->shader_info->vs.needs_base_instance) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.start_instance);
|
|
|
|
}
|
|
|
|
}
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
declare_vs_input_vgprs(struct radv_shader_args *args)
|
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vertex_id);
|
|
|
|
if (!args->is_gs_copy_shader) {
|
|
|
|
if (args->options->key.vs_common_out.as_ls) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_rel_patch_id);
|
|
|
|
if (args->options->chip_class >= GFX10) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id);
|
|
|
|
} else {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (args->options->chip_class >= GFX10) {
|
|
|
|
if (args->options->key.vs_common_out.as_ngg) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id);
|
|
|
|
} else {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_prim_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_prim_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
declare_streamout_sgprs(struct radv_shader_args *args, gl_shader_stage stage)
|
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
int i;
|
|
|
|
|
|
|
|
if (args->options->use_ngg_streamout) {
|
|
|
|
if (stage == MESA_SHADER_TESS_EVAL)
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Streamout SGPRs. */
|
|
|
|
if (args->shader_info->so.num_outputs) {
|
|
|
|
assert(stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL);
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_config);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_write_index);
|
|
|
|
} else if (stage == MESA_SHADER_TESS_EVAL) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* A streamout buffer offset is loaded if the stride is non-zero. */
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
if (!args->shader_info->so.strides[i])
|
|
|
|
continue;
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_offset[i]);
|
|
|
|
}
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
declare_tes_input_vgprs(struct radv_shader_args *args)
|
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.tes_u);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.tes_v);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tes_rel_patch_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tes_patch_id);
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
2021-06-07 22:23:38 +01:00
|
|
|
static void
|
|
|
|
declare_ngg_sgprs(struct radv_shader_args *args, gl_shader_stage stage)
|
|
|
|
{
|
|
|
|
if (stage == MESA_SHADER_GEOMETRY) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_gs_state);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->shader_info->has_ngg_culling) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_culling_settings);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_viewport_scale[0]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_viewport_scale[1]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_viewport_translate[0]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_viewport_translate[1]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-11-11 17:05:03 +00:00
|
|
|
static void
|
2021-04-10 02:24:05 +01:00
|
|
|
set_global_input_locs(struct radv_shader_args *args, const struct user_sgpr_info *user_sgpr_info,
|
|
|
|
uint8_t *user_sgpr_idx)
|
2019-11-11 17:05:03 +00:00
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
uint32_t mask = args->shader_info->desc_set_used_mask;
|
|
|
|
|
|
|
|
if (!user_sgpr_info->indirect_all_descriptor_sets) {
|
|
|
|
while (mask) {
|
|
|
|
int i = u_bit_scan(&mask);
|
|
|
|
|
|
|
|
set_loc_desc(args, i, user_sgpr_idx);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
set_loc_shader_ptr(args, AC_UD_INDIRECT_DESCRIPTOR_SETS, user_sgpr_idx);
|
|
|
|
|
|
|
|
args->shader_info->need_indirect_descriptor_sets = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->shader_info->loads_push_constants) {
|
|
|
|
set_loc_shader_ptr(args, AC_UD_PUSH_CONSTANTS, user_sgpr_idx);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->shader_info->num_inline_push_consts) {
|
|
|
|
set_loc_shader(args, AC_UD_INLINE_PUSH_CONSTANTS, user_sgpr_idx,
|
|
|
|
args->shader_info->num_inline_push_consts);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->streamout_buffers.used) {
|
|
|
|
set_loc_shader_ptr(args, AC_UD_STREAMOUT_BUFFERS, user_sgpr_idx);
|
|
|
|
}
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2021-04-10 02:24:05 +01:00
|
|
|
set_vs_specific_input_locs(struct radv_shader_args *args, gl_shader_stage stage,
|
|
|
|
bool has_previous_stage, gl_shader_stage previous_stage,
|
|
|
|
uint8_t *user_sgpr_idx)
|
2019-11-11 17:05:03 +00:00
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
if (!args->is_gs_copy_shader && (stage == MESA_SHADER_VERTEX ||
|
|
|
|
(has_previous_stage && previous_stage == MESA_SHADER_VERTEX))) {
|
radv,aco: use per-attribute vertex descriptors for robustness
We have to use a different num_records for each attribute to correctly
implement robust buffer access.
fossil-db (GFX10.3, robustBufferAccess enabled):
Totals from 60059 (41.06% of 146267) affected shaders:
VGPRs: 2169040 -> 2169024 (-0.00%); split: -0.02%, +0.02%
CodeSize: 79473128 -> 81156016 (+2.12%); split: -0.00%, +2.12%
MaxWaves: 1635360 -> 1635258 (-0.01%); split: +0.00%, -0.01%
Instrs: 15559040 -> 15793205 (+1.51%); split: -0.01%, +1.52%
Latency: 90954792 -> 91308768 (+0.39%); split: -0.30%, +0.69%
InvThroughput: 14937873 -> 14958761 (+0.14%); split: -0.04%, +0.18%
VClause: 444280 -> 412074 (-7.25%); split: -9.22%, +1.97%
SClause: 588545 -> 644141 (+9.45%); split: -0.54%, +9.99%
Copies: 1010395 -> 1011232 (+0.08%); split: -0.44%, +0.53%
Branches: 274279 -> 274282 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 1431171 -> 1405056 (-1.82%); split: -2.89%, +1.07%
PreVGPRs: 1575253 -> 1575259 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7871>
2020-12-01 17:41:16 +00:00
|
|
|
if (args->shader_info->vs.vb_desc_usage_mask) {
|
2021-04-10 02:24:05 +01:00
|
|
|
set_loc_shader_ptr(args, AC_UD_VS_VERTEX_BUFFERS, user_sgpr_idx);
|
|
|
|
}
|
|
|
|
|
radv,aco: use per-attribute vertex descriptors for robustness
We have to use a different num_records for each attribute to correctly
implement robust buffer access.
fossil-db (GFX10.3, robustBufferAccess enabled):
Totals from 60059 (41.06% of 146267) affected shaders:
VGPRs: 2169040 -> 2169024 (-0.00%); split: -0.02%, +0.02%
CodeSize: 79473128 -> 81156016 (+2.12%); split: -0.00%, +2.12%
MaxWaves: 1635360 -> 1635258 (-0.01%); split: +0.00%, -0.01%
Instrs: 15559040 -> 15793205 (+1.51%); split: -0.01%, +1.52%
Latency: 90954792 -> 91308768 (+0.39%); split: -0.30%, +0.69%
InvThroughput: 14937873 -> 14958761 (+0.14%); split: -0.04%, +0.18%
VClause: 444280 -> 412074 (-7.25%); split: -9.22%, +1.97%
SClause: 588545 -> 644141 (+9.45%); split: -0.54%, +9.99%
Copies: 1010395 -> 1011232 (+0.08%); split: -0.44%, +0.53%
Branches: 274279 -> 274282 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 1431171 -> 1405056 (-1.82%); split: -2.89%, +1.07%
PreVGPRs: 1575253 -> 1575259 (+0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7871>
2020-12-01 17:41:16 +00:00
|
|
|
unsigned vs_num =
|
|
|
|
count_vs_user_sgprs(args) - (args->shader_info->vs.vb_desc_usage_mask ? 1 : 0);
|
2021-04-10 02:24:05 +01:00
|
|
|
set_loc_shader(args, AC_UD_VS_BASE_VERTEX_START_INSTANCE, user_sgpr_idx, vs_num);
|
|
|
|
}
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
2021-06-07 22:23:38 +01:00
|
|
|
static void
|
|
|
|
set_ngg_sgprs_locs(struct radv_shader_args *args, gl_shader_stage stage, uint8_t *user_sgpr_idx)
|
|
|
|
{
|
|
|
|
if (stage == MESA_SHADER_GEOMETRY) {
|
|
|
|
assert(args->ngg_gs_state.used);
|
|
|
|
set_loc_shader(args, AC_UD_NGG_GS_STATE, user_sgpr_idx, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->shader_info->has_ngg_culling) {
|
|
|
|
assert(args->ngg_culling_settings.used &&
|
|
|
|
args->ngg_viewport_scale[0].used && args->ngg_viewport_scale[1].used &&
|
|
|
|
args->ngg_viewport_translate[0].used && args->ngg_viewport_translate[1].used);
|
|
|
|
|
|
|
|
set_loc_shader(args, AC_UD_NGG_CULLING_SETTINGS, user_sgpr_idx, 1);
|
|
|
|
set_loc_shader(args, AC_UD_NGG_VIEWPORT, user_sgpr_idx, 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-11-11 17:05:03 +00:00
|
|
|
/* Returns whether the stage is a stage that can be directly before the GS */
|
2021-04-10 02:24:05 +01:00
|
|
|
static bool
|
|
|
|
is_pre_gs_stage(gl_shader_stage stage)
|
2019-11-11 17:05:03 +00:00
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
return stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL;
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2021-04-10 02:24:05 +01:00
|
|
|
radv_declare_shader_args(struct radv_shader_args *args, gl_shader_stage stage,
|
|
|
|
bool has_previous_stage, gl_shader_stage previous_stage)
|
2019-11-11 17:05:03 +00:00
|
|
|
{
|
2021-04-10 02:24:05 +01:00
|
|
|
struct user_sgpr_info user_sgpr_info;
|
|
|
|
bool needs_view_index = needs_view_index_sgpr(args, stage);
|
|
|
|
|
|
|
|
if (args->options->chip_class >= GFX10) {
|
|
|
|
if (is_pre_gs_stage(stage) && args->options->key.vs_common_out.as_ngg) {
|
|
|
|
/* On GFX10, VS is merged into GS for NGG. */
|
|
|
|
previous_stage = stage;
|
|
|
|
stage = MESA_SHADER_GEOMETRY;
|
|
|
|
has_previous_stage = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i = 0; i < MAX_SETS; i++)
|
|
|
|
args->shader_info->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1;
|
|
|
|
for (int i = 0; i < AC_UD_MAX_UD; i++)
|
|
|
|
args->shader_info->user_sgprs_locs.shader_data[i].sgpr_idx = -1;
|
|
|
|
|
|
|
|
allocate_user_sgprs(args, stage, has_previous_stage, previous_stage, needs_view_index,
|
|
|
|
&user_sgpr_info);
|
|
|
|
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ring_offsets);
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (stage) {
|
|
|
|
case MESA_SHADER_COMPUTE:
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
2021-03-23 01:20:55 +00:00
|
|
|
if (args->shader_info->cs.uses_sbt) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &args->ac.sbt_descriptors);
|
|
|
|
}
|
|
|
|
|
2021-04-10 02:24:05 +01:00
|
|
|
if (args->shader_info->cs.uses_grid_size) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_INT, &args->ac.num_work_groups);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i = 0; i < 3; i++) {
|
|
|
|
if (args->shader_info->cs.uses_block_id[i]) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.workgroup_ids[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->shader_info->cs.uses_local_invocation_idx) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tg_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.local_invocation_ids);
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_VERTEX:
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
declare_vs_specific_input_sgprs(args, stage, has_previous_stage, previous_stage);
|
|
|
|
|
|
|
|
if (needs_view_index) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->options->key.vs_common_out.as_es) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset);
|
|
|
|
} else if (args->options->key.vs_common_out.as_ls) {
|
|
|
|
/* no extra parameters */
|
|
|
|
} else {
|
|
|
|
declare_streamout_sgprs(args, stage);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
}
|
2021-06-07 22:23:38 +01:00
|
|
|
if (args->options->key.vs_common_out.as_ngg) {
|
|
|
|
declare_ngg_sgprs(args, stage);
|
|
|
|
}
|
2021-04-10 02:24:05 +01:00
|
|
|
|
|
|
|
declare_vs_input_vgprs(args);
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_TESS_CTRL:
|
|
|
|
if (has_previous_stage) {
|
|
|
|
// First 6 system regs
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.merged_wave_info);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tcs_factor_offset);
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown
|
|
|
|
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
declare_vs_specific_input_sgprs(args, stage, has_previous_stage, previous_stage);
|
|
|
|
|
|
|
|
if (needs_view_index) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_rel_ids);
|
|
|
|
|
|
|
|
declare_vs_input_vgprs(args);
|
|
|
|
} else {
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
if (needs_view_index) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tcs_factor_offset);
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
}
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_rel_ids);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_TESS_EVAL:
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
if (needs_view_index)
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
|
|
|
|
|
|
|
|
if (args->options->key.vs_common_out.as_es) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset);
|
|
|
|
} else {
|
|
|
|
declare_streamout_sgprs(args, stage);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset);
|
|
|
|
}
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
}
|
2021-06-07 22:23:38 +01:00
|
|
|
if (args->options->key.vs_common_out.as_ngg) {
|
|
|
|
declare_ngg_sgprs(args, stage);
|
|
|
|
}
|
2021-04-10 02:24:05 +01:00
|
|
|
declare_tes_input_vgprs(args);
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_GEOMETRY:
|
|
|
|
if (has_previous_stage) {
|
|
|
|
// First 6 system regs
|
|
|
|
if (args->options->key.vs_common_out.as_ngg) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_tg_info);
|
|
|
|
} else {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs2vs_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.merged_wave_info);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset);
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown
|
|
|
|
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
if (previous_stage != MESA_SHADER_TESS_EVAL) {
|
|
|
|
declare_vs_specific_input_sgprs(args, stage, has_previous_stage, previous_stage);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (needs_view_index) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args->options->key.vs_common_out.as_ngg) {
|
2021-06-07 22:23:38 +01:00
|
|
|
declare_ngg_sgprs(args, stage);
|
2021-04-10 02:24:05 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[2]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_prim_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_invocation_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[4]);
|
|
|
|
|
|
|
|
if (previous_stage == MESA_SHADER_VERTEX) {
|
|
|
|
declare_vs_input_vgprs(args);
|
|
|
|
} else {
|
|
|
|
declare_tes_input_vgprs(args);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
if (needs_view_index) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.view_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs2vs_offset);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_wave_id);
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
}
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[1]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_prim_id);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[2]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[3]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[4]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[5]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_invocation_id);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_FRAGMENT:
|
|
|
|
declare_global_input_sgprs(args, &user_sgpr_info);
|
|
|
|
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.prim_mask);
|
|
|
|
if (args->options->explicit_scratch_args) {
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset);
|
|
|
|
}
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.persp_sample);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.persp_center);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.persp_centroid);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.pull_model);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.linear_sample);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.linear_center);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.linear_centroid);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, NULL); /* line stipple tex */
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[0]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[1]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[2]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[3]);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.front_face);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.ancillary);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.sample_coverage);
|
|
|
|
ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* fixed pt */
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
unreachable("Shader stage not implemented");
|
|
|
|
}
|
|
|
|
|
|
|
|
args->shader_info->num_input_vgprs = 0;
|
|
|
|
args->shader_info->num_input_sgprs = 2;
|
|
|
|
args->shader_info->num_input_sgprs += args->ac.num_sgprs_used;
|
|
|
|
args->shader_info->num_input_vgprs = args->ac.num_vgprs_used;
|
|
|
|
|
|
|
|
uint8_t user_sgpr_idx = 0;
|
|
|
|
|
|
|
|
set_loc_shader_ptr(args, AC_UD_SCRATCH_RING_OFFSETS, &user_sgpr_idx);
|
|
|
|
|
|
|
|
/* For merged shaders the user SGPRs start at 8, with 8 system SGPRs in front (including
|
|
|
|
* the rw_buffers at s0/s1. With user SGPR0 = s8, lets restart the count from 0 */
|
|
|
|
if (has_previous_stage)
|
|
|
|
user_sgpr_idx = 0;
|
|
|
|
|
|
|
|
set_global_input_locs(args, &user_sgpr_info, &user_sgpr_idx);
|
|
|
|
|
|
|
|
switch (stage) {
|
|
|
|
case MESA_SHADER_COMPUTE:
|
2021-03-23 01:20:55 +00:00
|
|
|
if (args->shader_info->cs.uses_sbt) {
|
|
|
|
set_loc_shader_ptr(args, AC_UD_CS_SBT_DESCRIPTORS, &user_sgpr_idx);
|
|
|
|
}
|
2021-04-10 02:24:05 +01:00
|
|
|
if (args->shader_info->cs.uses_grid_size) {
|
|
|
|
set_loc_shader(args, AC_UD_CS_GRID_SIZE, &user_sgpr_idx, 3);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_VERTEX:
|
|
|
|
set_vs_specific_input_locs(args, stage, has_previous_stage, previous_stage, &user_sgpr_idx);
|
|
|
|
if (args->ac.view_index.used)
|
|
|
|
set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
|
2021-06-07 22:23:38 +01:00
|
|
|
if (args->options->key.vs_common_out.as_ngg)
|
|
|
|
set_ngg_sgprs_locs(args, stage, &user_sgpr_idx);
|
2021-04-10 02:24:05 +01:00
|
|
|
break;
|
|
|
|
case MESA_SHADER_TESS_CTRL:
|
|
|
|
set_vs_specific_input_locs(args, stage, has_previous_stage, previous_stage, &user_sgpr_idx);
|
|
|
|
if (args->ac.view_index.used)
|
|
|
|
set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
|
|
|
|
break;
|
|
|
|
case MESA_SHADER_TESS_EVAL:
|
|
|
|
if (args->ac.view_index.used)
|
|
|
|
set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
|
2021-06-07 22:23:38 +01:00
|
|
|
if (args->options->key.vs_common_out.as_ngg)
|
|
|
|
set_ngg_sgprs_locs(args, stage, &user_sgpr_idx);
|
2021-04-10 02:24:05 +01:00
|
|
|
break;
|
|
|
|
case MESA_SHADER_GEOMETRY:
|
|
|
|
if (has_previous_stage) {
|
|
|
|
if (previous_stage == MESA_SHADER_VERTEX)
|
|
|
|
set_vs_specific_input_locs(args, stage, has_previous_stage, previous_stage,
|
|
|
|
&user_sgpr_idx);
|
|
|
|
}
|
|
|
|
if (args->ac.view_index.used)
|
|
|
|
set_loc_shader(args, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
|
|
|
|
|
2021-06-07 22:23:38 +01:00
|
|
|
if (args->options->key.vs_common_out.as_ngg)
|
|
|
|
set_ngg_sgprs_locs(args, stage, &user_sgpr_idx);
|
2021-04-10 02:24:05 +01:00
|
|
|
break;
|
|
|
|
case MESA_SHADER_FRAGMENT:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
unreachable("Shader stage not implemented");
|
|
|
|
}
|
|
|
|
|
|
|
|
args->shader_info->num_user_sgprs = user_sgpr_idx;
|
2019-11-11 17:05:03 +00:00
|
|
|
}
|