2019-03-06 21:21:51 +00:00
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/*
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* Copyright © 2019 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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#include "nir_deref.h"
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/** @file nir_lower_io_to_vector.c
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*
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* Merges compatible input/output variables residing in different components
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* of the same location. It's expected that further passes such as
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* nir_lower_io_to_temporaries will combine loads and stores of the merged
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* variables, producing vector nir_load_input/nir_store_output instructions
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* when all is said and done.
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*/
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2019-05-17 11:53:32 +01:00
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/* FRAG_RESULT_MAX+1 instead of just FRAG_RESULT_MAX because of how this pass
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* handles dual source blending */
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#define MAX_SLOTS MAX2(VARYING_SLOT_TESS_MAX, FRAG_RESULT_MAX+1)
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static unsigned
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get_slot(const nir_variable *var)
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{
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/* This handling of dual-source blending might not be correct when more than
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* one render target is supported, but it seems no driver supports more than
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* one. */
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return var->data.location + var->data.index;
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}
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2019-05-17 15:04:39 +01:00
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static const struct glsl_type *
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get_per_vertex_type(const nir_shader *shader, const nir_variable *var,
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unsigned *num_vertices)
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{
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if (nir_is_per_vertex_io(var, shader->info.stage)) {
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assert(glsl_type_is_array(var->type));
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if (num_vertices)
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*num_vertices = glsl_get_length(var->type);
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return glsl_get_array_element(var->type);
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} else {
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if (num_vertices)
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*num_vertices = 0;
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return var->type;
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}
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}
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2019-03-06 21:21:51 +00:00
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static const struct glsl_type *
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resize_array_vec_type(const struct glsl_type *type, unsigned num_components)
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{
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if (glsl_type_is_array(type)) {
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const struct glsl_type *arr_elem =
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resize_array_vec_type(glsl_get_array_element(type), num_components);
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return glsl_array_type(arr_elem, glsl_get_length(type), 0);
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} else {
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assert(glsl_type_is_vector_or_scalar(type));
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return glsl_vector_type(glsl_get_base_type(type), num_components);
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}
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}
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static bool
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2019-05-17 15:04:39 +01:00
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variables_can_merge(const nir_shader *shader,
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const nir_variable *a, const nir_variable *b,
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bool same_array_structure)
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2019-03-06 21:21:51 +00:00
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{
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2019-09-06 21:38:57 +01:00
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if (a->data.compact || b->data.compact)
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return false;
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2019-03-06 21:21:51 +00:00
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const struct glsl_type *a_type_tail = a->type;
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const struct glsl_type *b_type_tail = b->type;
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2019-05-17 15:04:39 +01:00
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if (nir_is_per_vertex_io(a, shader->info.stage) !=
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nir_is_per_vertex_io(b, shader->info.stage))
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return false;
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2019-03-06 21:21:51 +00:00
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/* They must have the same array structure */
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2019-05-17 15:04:39 +01:00
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if (same_array_structure) {
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while (glsl_type_is_array(a_type_tail)) {
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if (!glsl_type_is_array(b_type_tail))
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return false;
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2019-03-06 21:21:51 +00:00
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2019-05-17 15:04:39 +01:00
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if (glsl_get_length(a_type_tail) != glsl_get_length(b_type_tail))
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return false;
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2019-03-06 21:21:51 +00:00
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2019-05-17 15:04:39 +01:00
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a_type_tail = glsl_get_array_element(a_type_tail);
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b_type_tail = glsl_get_array_element(b_type_tail);
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}
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if (glsl_type_is_array(b_type_tail))
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return false;
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} else {
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a_type_tail = glsl_without_array(a_type_tail);
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b_type_tail = glsl_without_array(b_type_tail);
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2019-03-06 21:21:51 +00:00
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}
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if (!glsl_type_is_vector_or_scalar(a_type_tail) ||
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!glsl_type_is_vector_or_scalar(b_type_tail))
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return false;
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2019-05-17 15:04:39 +01:00
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if (glsl_get_base_type(a_type_tail) != glsl_get_base_type(b_type_tail))
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return false;
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/* TODO: add 64/16bit support ? */
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if (glsl_get_bit_size(a_type_tail) != 32)
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2019-03-06 21:21:51 +00:00
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return false;
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assert(a->data.mode == b->data.mode);
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if (shader->info.stage == MESA_SHADER_FRAGMENT &&
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a->data.mode == nir_var_shader_in &&
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a->data.interpolation != b->data.interpolation)
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return false;
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2019-05-17 11:53:32 +01:00
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if (shader->info.stage == MESA_SHADER_FRAGMENT &&
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a->data.mode == nir_var_shader_out &&
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a->data.index != b->data.index)
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return false;
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2019-03-06 21:21:51 +00:00
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return true;
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}
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2019-05-17 15:04:39 +01:00
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static const struct glsl_type *
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get_flat_type(const nir_shader *shader, nir_variable *old_vars[MAX_SLOTS][4],
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unsigned *loc, nir_variable **first_var, unsigned *num_vertices)
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{
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unsigned todo = 1;
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unsigned slots = 0;
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unsigned num_vars = 0;
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enum glsl_base_type base;
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*num_vertices = 0;
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*first_var = NULL;
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while (todo) {
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assert(*loc < MAX_SLOTS);
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for (unsigned frac = 0; frac < 4; frac++) {
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nir_variable *var = old_vars[*loc][frac];
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if (!var)
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continue;
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if ((*first_var &&
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!variables_can_merge(shader, var, *first_var, false)) ||
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var->data.compact) {
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(*loc)++;
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return NULL;
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}
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if (!*first_var) {
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if (!glsl_type_is_vector_or_scalar(glsl_without_array(var->type))) {
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(*loc)++;
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return NULL;
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}
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*first_var = var;
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base = glsl_get_base_type(
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glsl_without_array(get_per_vertex_type(shader, var, NULL)));
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}
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bool vs_in = shader->info.stage == MESA_SHADER_VERTEX &&
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var->data.mode == nir_var_shader_in;
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unsigned var_slots = glsl_count_attribute_slots(
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get_per_vertex_type(shader, var, num_vertices), vs_in);
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todo = MAX2(todo, var_slots);
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num_vars++;
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}
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todo--;
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slots++;
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(*loc)++;
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}
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if (num_vars <= 1)
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return NULL;
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return glsl_array_type(glsl_vector_type(base, 4), slots, 0);
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}
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2019-03-06 21:21:51 +00:00
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static bool
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create_new_io_vars(nir_shader *shader, struct exec_list *io_list,
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2019-05-17 15:04:39 +01:00
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nir_variable *new_vars[MAX_SLOTS][4],
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bool flat_vars[MAX_SLOTS])
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2019-03-06 21:21:51 +00:00
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{
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if (exec_list_is_empty(io_list))
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return false;
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2019-05-17 15:04:39 +01:00
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nir_variable *old_vars[MAX_SLOTS][4] = {{0}};
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2019-03-06 21:21:51 +00:00
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nir_foreach_variable(var, io_list) {
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2019-05-17 15:04:39 +01:00
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unsigned frac = var->data.location_frac;
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old_vars[get_slot(var)][frac] = var;
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2019-03-06 21:21:51 +00:00
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}
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bool merged_any_vars = false;
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2019-05-17 11:53:32 +01:00
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for (unsigned loc = 0; loc < MAX_SLOTS; loc++) {
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2019-03-06 21:21:51 +00:00
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unsigned frac = 0;
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while (frac < 4) {
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nir_variable *first_var = old_vars[loc][frac];
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if (!first_var) {
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frac++;
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continue;
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}
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int first = frac;
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bool found_merge = false;
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while (frac < 4) {
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nir_variable *var = old_vars[loc][frac];
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if (!var)
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break;
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if (var != first_var) {
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2019-05-17 15:04:39 +01:00
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if (!variables_can_merge(shader, first_var, var, true))
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2019-03-06 21:21:51 +00:00
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break;
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found_merge = true;
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}
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const unsigned num_components =
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glsl_get_components(glsl_without_array(var->type));
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2019-05-17 15:04:39 +01:00
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if (!num_components) {
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assert(frac == 0);
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frac++;
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break; /* The type was a struct. */
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}
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2019-03-06 21:21:51 +00:00
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/* We had better not have any overlapping vars */
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for (unsigned i = 1; i < num_components; i++)
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assert(old_vars[loc][frac + i] == NULL);
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frac += num_components;
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}
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if (!found_merge)
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continue;
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merged_any_vars = true;
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nir_variable *var = nir_variable_clone(old_vars[loc][first], shader);
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var->data.location_frac = first;
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var->type = resize_array_vec_type(var->type, frac - first);
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nir_shader_add_variable(shader, var);
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2019-05-17 15:04:39 +01:00
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for (unsigned i = first; i < frac; i++) {
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2019-03-06 21:21:51 +00:00
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new_vars[loc][i] = var;
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2019-05-17 15:04:39 +01:00
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old_vars[loc][i] = NULL;
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}
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old_vars[loc][first] = var;
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}
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}
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/* "flat" mode: tries to ensure there is at most one variable per slot by
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* merging variables into vec4s
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*/
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for (unsigned loc = 0; loc < MAX_SLOTS;) {
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nir_variable *first_var;
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unsigned num_vertices;
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unsigned new_loc = loc;
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const struct glsl_type *flat_type =
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get_flat_type(shader, old_vars, &new_loc, &first_var, &num_vertices);
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if (flat_type) {
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merged_any_vars = true;
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nir_variable *var = nir_variable_clone(first_var, shader);
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var->data.location_frac = 0;
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if (num_vertices)
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var->type = glsl_array_type(flat_type, num_vertices, 0);
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else
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var->type = flat_type;
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nir_shader_add_variable(shader, var);
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for (unsigned i = 0; i < glsl_get_length(flat_type); i++) {
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for (unsigned j = 0; j < 4; j++)
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new_vars[loc + i][j] = var;
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flat_vars[loc + i] = true;
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}
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2019-03-06 21:21:51 +00:00
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}
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2019-05-17 15:04:39 +01:00
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loc = new_loc;
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2019-03-06 21:21:51 +00:00
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}
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return merged_any_vars;
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}
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static nir_deref_instr *
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build_array_deref_of_new_var(nir_builder *b, nir_variable *new_var,
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nir_deref_instr *leader)
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{
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if (leader->deref_type == nir_deref_type_var)
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return nir_build_deref_var(b, new_var);
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nir_deref_instr *parent =
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build_array_deref_of_new_var(b, new_var, nir_deref_instr_parent(leader));
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return nir_build_deref_follower(b, parent, leader);
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}
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2019-05-17 15:04:39 +01:00
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static nir_ssa_def *
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build_array_index(nir_builder *b, nir_deref_instr *deref, nir_ssa_def *base,
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bool vs_in)
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{
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switch (deref->deref_type) {
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case nir_deref_type_var:
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return base;
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case nir_deref_type_array: {
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nir_ssa_def *index = nir_i2i(b, deref->arr.index.ssa,
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deref->dest.ssa.bit_size);
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return nir_iadd(
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b, build_array_index(b, nir_deref_instr_parent(deref), base, vs_in),
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nir_imul_imm(b, index, glsl_count_attribute_slots(deref->type, vs_in)));
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}
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default:
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unreachable("Invalid deref instruction type");
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}
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}
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static nir_deref_instr *
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build_array_deref_of_new_var_flat(nir_shader *shader,
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nir_builder *b, nir_variable *new_var,
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nir_deref_instr *leader, unsigned base)
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|
|
|
{
|
|
|
|
nir_deref_instr *deref = nir_build_deref_var(b, new_var);
|
|
|
|
|
|
|
|
if (nir_is_per_vertex_io(new_var, shader->info.stage)) {
|
|
|
|
assert(leader->deref_type == nir_deref_type_array);
|
|
|
|
nir_ssa_def *index = leader->arr.index.ssa;
|
|
|
|
leader = nir_deref_instr_parent(leader);
|
|
|
|
deref = nir_build_deref_array(b, deref, index);
|
|
|
|
}
|
|
|
|
|
|
|
|
bool vs_in = shader->info.stage == MESA_SHADER_VERTEX &&
|
|
|
|
new_var->data.mode == nir_var_shader_in;
|
|
|
|
return nir_build_deref_array(
|
|
|
|
b, deref, build_array_index(b, leader, nir_imm_int(b, base), vs_in));
|
|
|
|
}
|
|
|
|
|
2019-03-06 21:21:51 +00:00
|
|
|
static bool
|
|
|
|
nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
|
|
|
|
{
|
|
|
|
assert(!(modes & ~(nir_var_shader_in | nir_var_shader_out)));
|
|
|
|
|
|
|
|
nir_builder b;
|
|
|
|
nir_builder_init(&b, impl);
|
|
|
|
|
|
|
|
nir_metadata_require(impl, nir_metadata_dominance);
|
|
|
|
|
|
|
|
nir_shader *shader = impl->function->shader;
|
2019-05-17 11:53:32 +01:00
|
|
|
nir_variable *new_inputs[MAX_SLOTS][4] = {{0}};
|
|
|
|
nir_variable *new_outputs[MAX_SLOTS][4] = {{0}};
|
2019-05-17 15:04:39 +01:00
|
|
|
bool flat_inputs[MAX_SLOTS] = {0};
|
|
|
|
bool flat_outputs[MAX_SLOTS] = {0};
|
2019-03-06 21:21:51 +00:00
|
|
|
|
|
|
|
if (modes & nir_var_shader_in) {
|
|
|
|
/* Vertex shaders support overlapping inputs. We don't do those */
|
|
|
|
assert(b.shader->info.stage != MESA_SHADER_VERTEX);
|
|
|
|
|
|
|
|
/* If we don't actually merge any variables, remove that bit from modes
|
|
|
|
* so we don't bother doing extra non-work.
|
|
|
|
*/
|
|
|
|
if (!create_new_io_vars(shader, &shader->inputs,
|
2019-05-17 15:04:39 +01:00
|
|
|
new_inputs, flat_inputs))
|
2019-03-06 21:21:51 +00:00
|
|
|
modes &= ~nir_var_shader_in;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (modes & nir_var_shader_out) {
|
|
|
|
/* If we don't actually merge any variables, remove that bit from modes
|
|
|
|
* so we don't bother doing extra non-work.
|
|
|
|
*/
|
|
|
|
if (!create_new_io_vars(shader, &shader->outputs,
|
2019-05-17 15:04:39 +01:00
|
|
|
new_outputs, flat_outputs))
|
2019-03-06 21:21:51 +00:00
|
|
|
modes &= ~nir_var_shader_out;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!modes)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
bool progress = false;
|
|
|
|
|
|
|
|
/* Actually lower all the IO load/store intrinsics. Load instructions are
|
|
|
|
* lowered to a vector load and an ALU instruction to grab the channels we
|
|
|
|
* want. Outputs are lowered to a write-masked store of the vector output.
|
|
|
|
* For non-TCS outputs, we then run nir_lower_io_to_temporaries at the end
|
|
|
|
* to clean up the partial writes.
|
|
|
|
*/
|
|
|
|
nir_foreach_block(block, impl) {
|
|
|
|
nir_foreach_instr_safe(instr, block) {
|
|
|
|
if (instr->type != nir_instr_type_intrinsic)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
|
|
|
|
|
|
|
|
switch (intrin->intrinsic) {
|
|
|
|
case nir_intrinsic_load_deref:
|
|
|
|
case nir_intrinsic_interp_deref_at_centroid:
|
|
|
|
case nir_intrinsic_interp_deref_at_sample:
|
|
|
|
case nir_intrinsic_interp_deref_at_offset: {
|
|
|
|
nir_deref_instr *old_deref = nir_src_as_deref(intrin->src[0]);
|
|
|
|
if (!(old_deref->mode & modes))
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (old_deref->mode == nir_var_shader_out)
|
2019-05-17 11:53:32 +01:00
|
|
|
assert(b.shader->info.stage == MESA_SHADER_TESS_CTRL ||
|
|
|
|
b.shader->info.stage == MESA_SHADER_FRAGMENT);
|
2019-03-06 21:21:51 +00:00
|
|
|
|
|
|
|
nir_variable *old_var = nir_deref_instr_get_variable(old_deref);
|
|
|
|
|
2019-05-17 11:53:32 +01:00
|
|
|
const unsigned loc = get_slot(old_var);
|
2019-03-06 21:21:51 +00:00
|
|
|
const unsigned old_frac = old_var->data.location_frac;
|
|
|
|
nir_variable *new_var = old_deref->mode == nir_var_shader_in ?
|
|
|
|
new_inputs[loc][old_frac] :
|
|
|
|
new_outputs[loc][old_frac];
|
2019-05-17 15:04:39 +01:00
|
|
|
bool flat = old_deref->mode == nir_var_shader_in ?
|
|
|
|
flat_inputs[loc] : flat_outputs[loc];
|
2019-03-06 21:21:51 +00:00
|
|
|
if (!new_var)
|
|
|
|
break;
|
|
|
|
|
|
|
|
const unsigned new_frac = new_var->data.location_frac;
|
|
|
|
|
|
|
|
nir_component_mask_t vec4_comp_mask =
|
|
|
|
((1 << intrin->num_components) - 1) << old_frac;
|
|
|
|
|
|
|
|
b.cursor = nir_before_instr(&intrin->instr);
|
|
|
|
|
|
|
|
/* Rewrite the load to use the new variable and only select a
|
|
|
|
* portion of the result.
|
|
|
|
*/
|
2019-05-17 15:04:39 +01:00
|
|
|
nir_deref_instr *new_deref;
|
|
|
|
if (flat) {
|
|
|
|
new_deref = build_array_deref_of_new_var_flat(
|
|
|
|
shader, &b, new_var, old_deref, loc - get_slot(new_var));
|
|
|
|
} else {
|
|
|
|
assert(get_slot(new_var) == loc);
|
|
|
|
new_deref = build_array_deref_of_new_var(&b, new_var, old_deref);
|
|
|
|
assert(glsl_type_is_vector(new_deref->type));
|
|
|
|
}
|
2019-03-06 21:21:51 +00:00
|
|
|
nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
|
|
|
|
nir_src_for_ssa(&new_deref->dest.ssa));
|
|
|
|
|
|
|
|
intrin->num_components =
|
|
|
|
glsl_get_components(new_deref->type);
|
|
|
|
intrin->dest.ssa.num_components = intrin->num_components;
|
|
|
|
|
|
|
|
b.cursor = nir_after_instr(&intrin->instr);
|
|
|
|
|
|
|
|
nir_ssa_def *new_vec = nir_channels(&b, &intrin->dest.ssa,
|
|
|
|
vec4_comp_mask >> new_frac);
|
|
|
|
nir_ssa_def_rewrite_uses_after(&intrin->dest.ssa,
|
|
|
|
nir_src_for_ssa(new_vec),
|
|
|
|
new_vec->parent_instr);
|
|
|
|
|
|
|
|
progress = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case nir_intrinsic_store_deref: {
|
|
|
|
nir_deref_instr *old_deref = nir_src_as_deref(intrin->src[0]);
|
|
|
|
if (old_deref->mode != nir_var_shader_out)
|
|
|
|
break;
|
|
|
|
|
|
|
|
nir_variable *old_var = nir_deref_instr_get_variable(old_deref);
|
|
|
|
|
2019-05-17 11:53:32 +01:00
|
|
|
const unsigned loc = get_slot(old_var);
|
2019-03-06 21:21:51 +00:00
|
|
|
const unsigned old_frac = old_var->data.location_frac;
|
|
|
|
nir_variable *new_var = new_outputs[loc][old_frac];
|
2019-05-17 15:04:39 +01:00
|
|
|
bool flat = flat_outputs[loc];
|
2019-03-06 21:21:51 +00:00
|
|
|
if (!new_var)
|
|
|
|
break;
|
|
|
|
|
|
|
|
const unsigned new_frac = new_var->data.location_frac;
|
|
|
|
|
|
|
|
b.cursor = nir_before_instr(&intrin->instr);
|
|
|
|
|
|
|
|
/* Rewrite the store to be a masked store to the new variable */
|
2019-05-17 15:04:39 +01:00
|
|
|
nir_deref_instr *new_deref;
|
|
|
|
if (flat) {
|
|
|
|
new_deref = build_array_deref_of_new_var_flat(
|
|
|
|
shader, &b, new_var, old_deref, loc - get_slot(new_var));
|
|
|
|
} else {
|
|
|
|
assert(get_slot(new_var) == loc);
|
|
|
|
new_deref = build_array_deref_of_new_var(&b, new_var, old_deref);
|
|
|
|
assert(glsl_type_is_vector(new_deref->type));
|
|
|
|
}
|
2019-03-06 21:21:51 +00:00
|
|
|
nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
|
|
|
|
nir_src_for_ssa(&new_deref->dest.ssa));
|
|
|
|
|
|
|
|
intrin->num_components =
|
|
|
|
glsl_get_components(new_deref->type);
|
|
|
|
|
|
|
|
nir_component_mask_t old_wrmask = nir_intrinsic_write_mask(intrin);
|
|
|
|
|
|
|
|
assert(intrin->src[1].is_ssa);
|
|
|
|
nir_ssa_def *old_value = intrin->src[1].ssa;
|
|
|
|
nir_ssa_def *comps[4];
|
|
|
|
for (unsigned c = 0; c < intrin->num_components; c++) {
|
|
|
|
if (new_frac + c >= old_frac &&
|
|
|
|
(old_wrmask & 1 << (new_frac + c - old_frac))) {
|
|
|
|
comps[c] = nir_channel(&b, old_value,
|
|
|
|
new_frac + c - old_frac);
|
|
|
|
} else {
|
|
|
|
comps[c] = nir_ssa_undef(&b, old_value->num_components,
|
|
|
|
old_value->bit_size);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
nir_ssa_def *new_value = nir_vec(&b, comps, intrin->num_components);
|
|
|
|
nir_instr_rewrite_src(&intrin->instr, &intrin->src[1],
|
|
|
|
nir_src_for_ssa(new_value));
|
|
|
|
|
|
|
|
nir_intrinsic_set_write_mask(intrin,
|
|
|
|
old_wrmask << (old_frac - new_frac));
|
|
|
|
|
|
|
|
progress = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (progress) {
|
|
|
|
nir_metadata_preserve(impl, nir_metadata_block_index |
|
|
|
|
nir_metadata_dominance);
|
|
|
|
}
|
|
|
|
|
|
|
|
return progress;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
|
|
|
nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode modes)
|
|
|
|
{
|
|
|
|
bool progress = false;
|
|
|
|
|
|
|
|
nir_foreach_function(function, shader) {
|
|
|
|
if (function->impl)
|
|
|
|
progress |= nir_lower_io_to_vector_impl(function->impl, modes);
|
|
|
|
}
|
|
|
|
|
|
|
|
return progress;
|
|
|
|
}
|